ALINX AXKU042 KINTEX UltraScale FPGA Development Board User Manual

Isine ndhelikake

1 Papan Pangembangan FPGA ALINX AXKU042 KINTEX UltraScale

2 Papan inti FPGA

3 Gambar 4-1 Spesifikasi Lampu kilat QSPI

4 Part 1.8: Ukuran Ukuran

5 Bagean 2.13: Sumber Daya

6 Bagean 2.14: Penggemar

7 Fan Pin Assignment

8 Part 2.15: Ukuran Ukuran

9 Dokumen / Sumber Daya

9.1 Referensi

Papan Pangembangan FPGA ALINX AXKU042 KINTEX UltraScale

Versi Rekam
Alinx Electronic Technology (Shanghai) Co., Ltd, adhedhasar platform pangembangan seri KINTEX UltraSacale kanggo arsitektur (model: AXKU042) wis resmi dirilis. Supaya sampeyan bisa ngerti kanthi cepet platform pangembangan iki, kita wis nyusun manual pangguna iki.

Versi	Ngowahi Rekam
REV1.0	Nggawe Dokumen

AXKU042 nganggo model papan inti lan papan ekspansi, sing nggampangake pangembangan sekunder lan panggunaan papan inti. Papan inti dilengkapi karo papat 1GB kacepetan dhuwur DDR4 SDRAM chip lan loro 128Mb QSPI FLASH chip. Ing babagan desain papan ekspansi, kita wis nambah macem-macem antarmuka kanggo pangguna: loro antarmuka 10G SFP + serat optik, 3 antarmuka ekspansi FMC (1 HPC, 2 LPC), port jaringan 1 gigabit, 1 port serial UART, 1 SD antarmuka kertu, tombol LED, lan liya-liyane. Gambar ing ngisor iki minangka diagram skematis saka kabeh struktur sistem pangembangan:

Liwat diagram iki, sampeyan bisa ndeleng antarmuka lan fungsi sing ana ing Papan Pangembangan AXKU042:

Papan inti FPGA

Chip FPGA: Xilinx KINTEX UltraSacale chip XCKU040.
DDR4: Kanthi papat kapasitas gedhe 1GB (total 4 GB) DDR4 SDRAM, bisa digunakake minangka panyimpenan data kanggo FPGA, cache analisis gambar, lan pangolahan data;
QSPI FLASH loro 128Mbit QSPI NOR FLASH chip memori bisa digunakake minangka panyimpenan kanggo konfigurasi files lan data pangguna;

Siji getaran kristal diferensial 200 Mhz;
Loro LED dioda, 1 indikator daya, 1 indikator konfigurasi DONE.
Papan Pangembangan
1. Loro antarmuka komunikasi SFP lan serat optik, saben komunikasi data serat optik ditampa lan dikirim kanthi kecepatan nganti 16.3 Gb / s.
2. Siji antarmuka PCIE3.0 X8, mode endpoint, digunakake kanggo komunikasi data antarane PC lan PCIE.
3. Antarmuka USB Uart, digunakake kanggo komunikasi karo komputer kanggo debugging pangguna. Chip port serial nganggo chip USB-UAR saka Silicon Labs CP2102GM, lan antarmuka USB nganggo antarmuka USB MINI.
4. 1 saluran 10 / 100M / 1000MEthernet RJ45 antarmuka kanggo Ethernet exchange data karo komputer utawa piranti jaringan liyane. Chip antarmuka jaringan nggunakake chip GPHY kelas industri Micrel KSZ9031.
3 port ekspansi FMC standar, kalebu 2 port ekspansi LPC FMC lan 1 port ekspansi HPC FMC, sing bisa disambungake menyang macem-macem modul FMC saka Xilinx utawa Alinx (modul input lan output HDMI, modul kamera binokular, modul AD kacepetan dhuwur, lsp. )

1Wadhah kertu Micro SD, digunakake kanggo nyimpen gambar sistem operasi lan file sistem.
2 SMA antarmuka external, lencana disambungake menyang transceiver kanggo external dhuwur-kacepetan input lan sinyal output.

Onboard chip sensor suhu lan asor LM75 kanggo ndeteksi suhu lan kelembapan lingkungan ing sekitar papan.
Siji EEPROM digunakake kanggo komunikasi bis IIC lan panyimpenan saka sawetara informasi customer-ditetepake.

A 10-pin 2.54mm spasi standar JTAG port kanggo program FPGA download lan debugging. Pangguna bisa debug lan ngundhuh FPGA liwat downloader XILINX.
Loro kristal diferensial 156.25Mhz onboard nyedhiyakake jam referensi kanggo transceiver.

LED, 1 indikator daya, 4 indikator pengguna, 1 pasang indikator panel.

Bagean 1 AXKU042 Papan Pangembangan

Part 1.1: FPGA Development Board Pambuka

AXKU042 (model papan inti, padha ing ngisor iki) Papan inti FPGA, chip FPGA adhedhasar XCKU040-2FFVA1156I saka seri XILINX perusahaan XC7K325. Papan inti iki nggunakake papat Micron MT40A512M16LY-062EIT, sing saben duwe kapasitas total 1GB, kanthi kapasitas total 4GB. iku 128gb. Kajaba iku, konfigurasi chip FPGA nggunakake rong XNUMXMBit QSPI FLASH, digunakake minangka panyimpenan data lan sistem FPGA. files. Enem konektor Papan-kanggo-Papan Papan inti AXKU042 nggedhekake 359 IOs, kang 104 tingkat IO saka BANK64 lan BANK65 punika 3.3V, nalika tingkat IOs bank liyane 1.8V; Kajaba iku, papan inti uga nambahake 20 pasang antarmuka Transceiver GTH kanthi kacepetan dhuwur. Kanggo pangguna sing butuh akeh IO, papan inti iki bakal dadi pilihan sing apik. Lan bagean sambungan IO, baris antarane chip lan antarmuka wis rampung dawa witjaksono lan Processing diferensial, lan ukuran Papan inti mung 80 * 60 (mm), cocok banget kanggo pembangunan secondary.

Bagean 1.2: Chip FPGA
Papan pangembangan FPGA nggunakake chip KINTEX UltraScale Xilinx, nomer model XCKU040-2FFVA1156I. Kelas kacepetan yaiku 2 lan kelas suhu yaiku industri. Model iki minangka paket FFVA1156 kanthi 1156 pin lan pitch 1.0mm. Aturan jeneng chip kanggo Xilinx KINTEX UltraScale FPGA ditampilake ing Gambar 1-2-1 ing ngisor iki:

Gambar 1-2-1 Definisi Model Chip KINTEX UltraScale Series Parameter utama AXKU042 minangka nderek:

jeneng	Parameter khusus
Sel Logika	530,250
CLB LUT	242,400
CLB sandal jepit	484,800
Blok RAM (Mb)	21.1
DSP irisan	1,920
PCIe Gen3 x8	3
Transceiver GTH	20 个，16.3Gb/s maks
Kelas Kacepetan	-2
Kelas Suhu	Industri

Part 1.3: DDR4 DRAM
Papan pangembangan AXKU042 FPGA dilengkapi papat chip Micron 1GB DDR4, model MT40A512M16LY-062EIT. Papat DDR4 SDRAM mbentuk jembaré bus 64-dicokot. Amarga papat Kripik DDR4 disambungake menyang FPGA, DDR4 SDRAM bisa mlaku kanthi kecepatan nganti 1200MHz, lan papat sistem memori DDR4 disambungake langsung menyang antarmuka BANK44, BANK45, lan BANK46 saka FPGA. Konfigurasi tartamtu saka DDR4 SDRAM kapacak ing Tabel 3-1.

Gambar 3-1 Konfigurasi DDR4 SDRAM

Nomer Bit	Model Chip	Kapasitas	Pabrik
U45, U47, U48, U49	MT40A512M16LY-062EIT	512M x 16 bit	Mikron

Desain hardware DDR4 mbutuhake pertimbangan sing ketat babagan integritas sinyal. Kita wis kebak dianggep cocog resistor / terminal resistance, tilak kontrol impedansi, lan tilak kontrol dawa ing desain sirkuit lan desain PCB kanggo mesthekake
kacepetan dhuwur lan operasi stabil saka DDR3. Mode sambungan hardware FPGA lan DDR4 DRAM ditampilake ing Gambar 1-3-1:

Figure1-3-1 DDR4 DRAM skema diagram 4 bêsik DDR4 DRAM pin assignments

Bagean 1.4: QSPI Flash

Papan pangembangan AXKU042 FPGA dilengkapi loro 128MBit Quad-SPI FLASH, lan model kasebut yaiku N25Q128A, sing nggunakake 3.3V CMOS voltage standar. Amarga sifat non-molah malih saka QSPI FLASH, bisa nyimpen konfigurasi FPGA Bin files lan data pangguna liyane files dienggo. Model tartamtu lan paramèter sing gegandhengan karo QSPI FLASH ditampilake ing Figure 4-1.

Gambar 4-1 Spesifikasi Lampu kilat QSPI

QSPI FLASH disambungake menyang pin khusus BANK0 saka chip FPGA. Pin jam disambungake menyang CCLK0 saka BANK0, lan sinyal data liyane disambungake menyang pin D00 ~ D03 lan FCS. Figure 4-2 nuduhake sambungan hardware QSPI Flash lan FPGA Chip.

QSPI Flash pin assignments

Jeneng Sinyal	FPGA Jeneng Pin	FPGA Pin
PL_DDR4_DQ0	IO_L3N_T0L_N5_AD15N_44	AE20
PL_DDR4_DQ1	IO_L2N_T0L_N3_44	AG20

PL_DDR4_DQ2	IO_L2P_T0L_N2_44	AF20
PL_DDR4_DQ3	IO_L5P_T0U_N8_AD14P_44	AE22
PL_DDR4_DQ4	IO_L3P_T0L_N4_AD15P_44	AD20
PL_DDR4_DQ5	IO_L6N_T0U_N11_AD6N_44	AG22
PL_DDR4_DQ6	IO_L6P_T0U_N10_AD6P_44	AF22
PL_DDR4_DQ7	IO_L5N_T0U_N9_AD14N_44	AE23
PL_DDR4_DQ8	IO_L8N_T1L_N3_AD5N_44	AF24
PL_DDR4_DQ9	IO_L11P_T1U_N8_GC_44	AJ23
PL_DDR4_DQ10	IO_L8P_T1L_N2_AD5P_44	AF23
PL_DDR4_DQ11	IO_L12N_T1U_N11_GC_44	AH23
PL_DDR4_DQ12	IO_L9N_T1L_N5_AD12N_44	AG25
PL_DDR4_DQ13	IO_L11N_T1U_N9_GC_44	AJ24
PL_DDR4_DQ14	IO_L9P_T1L_N4_AD12P_44	AG24
PL_DDR4_DQ15	IO_L12P_T1U_N10_GC_44	AH22
PL_DDR4_DQ16	IO_L14P_T2L_N2_GC_44	AK22
PL_DDR4_DQ17	IO_L17P_T2U_N8_AD10P_44	AL22
PL_DDR4_DQ18	IO_L15N_T2L_N5_AD11N_44	AM20
PL_DDR4_DQ19	IO_L17N_T2U_N9_AD10N_44	AL23
PL_DDR4_DQ20	IO_L14N_T2L_N3_GC_44	AK23
PL_DDR4_DQ21	IO_L18N_T2U_N11_AD2N_44	AL25
PL_DDR4_DQ22	IO_L15P_T2L_N4_AD11P_44	AL20
PL_DDR4_DQ23	IO_L18P_T2U_N10_AD2P_44	AL24
PL_DDR4_DQ24	IO_L20P_T3L_N2_AD1P_44	AM22
PL_DDR4_DQ25	IO_L23P_T3U_N8_44	AP24
PL_DDR4_DQ26	IO_L20N_T3L_N3_AD1N_44	AN22
PL_DDR4_DQ27	IO_L21N_T3L_N5_AD8N_44	AN24
PL_DDR4_DQ28	IO_L24P_T3U_N10_44	AN23
PL_DDR4_DQ29	IO_L23N_T3U_N9_44	AP25
PL_DDR4_DQ30	IO_L24N_T3U_N11_44	AP23
PL_DDR4_DQ31	IO_L21P_T3L_N4_AD8P_44	AM24
PL_DDR4_DQ32	IO_L2P_T0L_N2_46	AM26
PL_DDR4_DQ33	IO_L6P_T0U_N10_AD6P_46	AJ28
PL_DDR4_DQ34	IO_L2N_T0L_N3_46	AM27
PL_DDR4_DQ35	IO_L6N_T0U_N11_AD6N_46	AK28
PL_DDR4_DQ36	IO_L5P_T0U_N8_AD14P_46	AH27

PL_DDR4_DQ37	IO_L5N_T0U_N9_AD14N_46	AH28
PL_DDR4_DQ38	IO_L3P_T0L_N4_AD15P_46	AK26
PL_DDR4_DQ39	IO_L3N_T0L_N5_AD15N_46	AK27
PL_DDR4_DQ40	IO_L9N_T1L_N5_AD12N_46	AN28
PL_DDR4_DQ41	IO_L12N_T1U_N11_GC_46	AM30
PL_DDR4_DQ42	IO_L8P_T1L_N2_AD5P_46	AP28
PL_DDR4_DQ43	IO_L11N_T1U_N9_GC_46	AM29
PL_DDR4_DQ44	IO_L9P_T1L_N4_AD12P_46	AN27
PL_DDR4_DQ45	IO_L12P_T1U_N10_GC_46	AL30
PL_DDR4_DQ46	IO_L11P_T1U_N8_GC_46	AL29
PL_DDR4_DQ47	IO_L8N_T1L_N3_AD5N_46	AP29
PL_DDR4_DQ48	IO_L14P_T2L_N2_GC_46	AK31
PL_DDR4_DQ49	IO_L18P_T2U_N10_AD2P_46	AH34
PL_DDR4_DQ50	IO_L14N_T2L_N3_GC_46	AK32
PL_DDR4_DQ51	IO_L15N_T2L_N5_AD11N_46	AJ31
PL_DDR4_DQ52	IO_L15P_T2L_N4_AD11P_46	AJ30
PL_DDR4_DQ53	IO_L17P_T2U_N8_AD10P_46	AH31
PL_DDR4_DQ54	IO_L18N_T2U_N11_AD2N_46	AJ34
PL_DDR4_DQ55	IO_L17N_T2U_N9_AD10N_46	AH32
PL_DDR4_DQ56	IO_L21P_T3L_N4_AD8P_46	AN31
PL_DDR4_DQ57	IO_L24P_T3U_N10_46	AL34
PL_DDR4_DQ58	IO_L23N_T3U_N9_46	AN32
PL_DDR4_DQ59	IO_L20P_T3L_N2_AD1P_46	AN33
PL_DDR4_DQ60	IO_L23P_T3U_N8_46	AM32
PL_DDR4_DQ61	IO_L24N_T3U_N11_46	AM34
PL_DDR4_DQ62	IO_L21N_T3L_N5_AD8N_46	AP31
PL_DDR4_DQ63	IO_L20N_T3L_N3_AD1N_46	AP33
PL_DDR4_DM0	IO_L1P_T0L_N0_DBC_44	AD21
PL_DDR4_DM1	IO_L7P_T1L_N0_QBC_AD13P_44	AE25
PL_DDR4_DM2	IO_L13P_T2L_N0_GC_QBC_44	AJ21
PL_DDR4_DM3	IO_L19P_T3L_N0_DBC_AD9P_44	AM21
PL_DDR4_DM4	IO_L1P_T0L_N0_DBC_46	AH26
PL_DDR4_DM5	IO_L7P_T1L_N0_QBC_AD13P_46	AN26
PL_DDR4_DM6	IO_L13P_T2L_N0_GC_QBC_46	AJ29
PL_DDR4_DM7	IO_L19P_T3L_N0_DBC_AD9P_46	AL32

PL_DDR4_DQS0_P	IO_L4P_T0U_N6_DBC_AD7P_44	AG21
PL_DDR4_DQS0_N	IO_L4N_T0U_N7_DBC_AD7N_44	AH21
PL_DDR4_DQS1_P	IO_L10P_T1U_N6_QBC_AD4P_44	AH24
PL_DDR4_DQS1_N	IO_L10N_T1U_N7_QBC_AD4N_44	AJ25
PL_DDR4_DQS2_P	IO_L16P_T2U_N6_QBC_AD3P_44	AJ20
PL_DDR4_DQS2_N	IO_L16N_T2U_N7_QBC_AD3N_44	AK20
PL_DDR4_DQS3_P	IO_L22P_T3U_N6_DBC_AD0P_44	AP20
PL_DDR4_DQS3_N	IO_L22N_T3U_N7_DBC_AD0N_44	AP21
PL_DDR4_DQS4_P	IO_L4P_T0U_N6_DBC_AD7P_46	AL27
PL_DDR4_DQS4_N	IO_L4N_T0U_N7_DBC_AD7N_46	AL28
PL_DDR4_DQS5_P	IO_L10P_T1U_N6_QBC_AD4P_46	AN29
PL_DDR4_DQS5_N	IO_L10N_T1U_N7_QBC_AD4N_46	AP30
PL_DDR4_DQS6_P	IO_L16P_T2U_N6_QBC_AD3P_46	AH33
PL_DDR4_DQS6_N	IO_L16N_T2U_N7_QBC_AD3N_46	AJ33
PL_DDR4_DQS7_P	IO_L22P_T3U_N6_DBC_AD0P_46	AN34
PL_DDR4_DQS7_N	IO_L22N_T3U_N7_DBC_AD0N_46	AP34
PL_DDR4_A0	IO_L18N_T2U_N11_AD2N_45	AG14
PL_DDR4_A1	IO_L23N_T3U_N9_45	AF17
PL_DDR4_A2	IO_L20P_T3L_N2_AD1P_45	AF15
PL_DDR4_A3	IO_L16N_T2U_N7_QBC_AD3N_45	AJ14
PL_DDR4_A4	IO_L19N_T3L_N1_DBC_AD9N_45	AD18
PL_DDR4_A5	IO_L15P_T2L_N4_AD11P_45	AG17
PL_DDR4_A6	IO_L23P_T3U_N8_45	AE17
PL_DDR4_A7	IO_L11N_T1U_N9_GC_45	AK18
PL_DDR4_A8	IO_L24P_T3U_N10_45	AD16
PL_DDR4_A9	IO_L13P_T2L_N0_GC_QBC_45	AH18
PL_DDR4_A10	IO_L19P_T3L_N0_DBC_AD9P_45	AD19
PL_DDR4_A11	IO_L24N_T3U_N11_45	AD15
PL_DDR4_A12	IO_L14P_T2L_N2_GC_45	AH16
PL_DDR4_A13	IO_L10N_T1U_N7_QBC_AD4N_45	AL17
PL_DDR4_BA0	IO_L18P_T2U_N10_AD2P_45	AG15
PL_DDR4_BA1	IO_L10P_T1U_N6_QBC_AD4P_45	AL18
PL_DDR4_BG0	IO_L16P_T2U_N6_QBC_AD3P_45	AJ15
PL_DDR4_WE_B	IO_L9N_T1L_N5_AD12N_45	AL15
PL_DDR4_RAS_B	IO_L8N_T1L_N3_AD5N_45	AM19

PL_DDR4_CAS_B	IO_L8P_T1L_N2_AD5P_45	AL19
PL_DDR4_CKE	IO_L14N_T2L_N3_GC_45	AJ16
PL_DDR4_ACT_B	IO_L21N_T3L_N5_AD8N_45	AF18
PL_DDR4_CLK_N	IO_L22N_T3U_N7_DBC_AD0N_45	AE15
PL_DDR4_CLK_P	IO_L22P_T3U_N6_DBC_AD0P_45	AE16
PL_DDR4_CS_B	IO_L21P_T3L_N4_AD8P_45	AE18
PL_DDR4_OTD	IO_L17P_T2U_N8_AD10P_45	AG19
PL_DDR4_PAR	IO_L20N_T3L_N3_AD1N_45	AF14
PL_DDR4_RST	IO_L15N_T2L_N5_AD11N_45	AG16

posisi	Model	Kapasitas	Pabrik
U14	N25Q128A	128Modhok	Numonyx

Bagean 1.5: Konfigurasi jam

Jeneng Sinyal	FPGA Jeneng Pin	FPGA Pin
QSPI_CCLK	CCLK_0	AA9
QSPI0_CS_B	RDWR_FCS_B_0	U7
QSPI0_IO0	D00_MOSI_0	AC7
QSPI0_IO1	D01_DIN_0	AB7
QSPI0_IO2	D02_0	AA7
QSPI0_IO3	D03_0	Y7

Jeneng Sinyal	FPGA Jeneng Pin	FPGA Pin
QSPI_CCLK	CCLK_0	AA9
QSPI1_CS_B	IO_L2N_T0L_N3_FWE_FCS2_B_65	G26
QSPI1_IO0	IO_L22P_T3U_N6_DBC_AD0P_D04_65	M20
QSPI1_IO1	IO_L22N_T3U_N7_DBC_AD0N_D05_65	L20
QSPI1_IO2	IO_L21P_T3L_N4_AD8P_D06_65	R21
QSPI1_IO3	IO_L21N_T3L_N5_AD8N_D07_65	R22

Sumber jam diferensial 200Mhz Sumber jam diferensial 200MHz diwenehake ing papan pangembangan FPGA kanggo nyedhiyakake jam sistem menyang FPGA. Output diferensial kristal disambungake menyang FPGA BANK45, sing bisa digunakake kanggo drive jam operasi pengontrol DDR lan logika pangguna liyane ing FPGA. Diagram skematis saka sumber jam ditampilake ing Figure 1-5-1.

Penugasan pin Jam Sistem

Jeneng Sinyal	Pin FPGA
PL_CLK0_P	AK17
PL_CLK0_N	AK16

Ana rong LED abang ing papan pangembangan AXKU042 FPGA, salah sijine yaiku indikator daya (PWR), lan siji yaiku indikator DONE. Nalika papan AXKU042 FPGA diuripake, indikator daya lan indikator DONE bakal madhangi; nalika AXKU042 FPGA dikonfigurasi, DONE LED bakal murup; Sambungan hardware LED ditampilake ing Figure 1-6-1.

Bagean 1.7: Sumber Daya
Daya input voltage saka papan pangembangan AXKU042 FPGA yaiku DC12V, lan sumber daya diwenehake dening papan operator. Diagram desain catu daya ing papan ditampilake ing Gambar 1-7-1 ing ngisor iki:

Gambar 1-7-1 Diagram skematik Power Supply
+12V ngasilake + 0.95V FPGA daya inti liwat DCDC daya chipcMYMGK1R820ERSR. Saiki output saka MYMGK1R820FRSR minangka dhuwur minangka 20A, kang adoh meets vol intitage dikarepake saiki. Banjur + 12V sumber daya liwat chip DCDC ETA1471 kui papat sumber daya: + 1.2V, 1.8V + 3.3V, lan MGTAVTT. MGTAVCC sing digunakake ing transceiver GTX digawe dening chip DCDC ETA8156, lan chip LDO SPX3819-1-8 digunakake kanggo ngasilake sumber daya tambahan saka GTX + 1.8V. VTT lan VREF voltages saka DDR4 kui dening TPS51200.

Part 1.8: Ukuran Ukuran

Bagean 1.9: Papan kanggo Papan Konektor pin assignment Papan inti ngembangaken total enem konektor expansion kacepetan dhuwur, lan nggunakake papat 120-pin konektor inter-board (J1, J3, J4, J5) lan loro 80-pin inter- konektor Papan (J2, J6) kanggo nyambung menyang Papan operator. Konektor kasebut nggunakake AXK5A2137YG lan AXK580137YG Panasonic. Konektor saka piring operator sing cocog yaiku AXK6A2337YG lan AXK680337YG. J1 disambungake menyang IO saka BANK66 lan BANK68, lan daya 1.8V.

Pin assignment saka konektor J1
Konektor J2 80 Pin, nyambungake sinyal diferensial kacepetan dhuwur saka transceiver BANK226 ~ 228.

J1 Pin	Jeneng Sinyal	Pin FPGA	J1 Pin	Jeneng Sinyal	Pin FPGA
1	B66_L3_N	C8	2	B66_L1_N	E8
3	B66_L3_P	D8	4	B66_L1_P	F8
5	B66_L7_N	K8	6	B66_L2_N	A9
7	B66_L7_P	L8	8	B66_L2_P	B9

J1 Pin	Jeneng Sinyal	Pin FPGA	J1 Pin	Jeneng Sinyal	Pin FPGA
1	B66_L3_N	C8	2	B66_L1_N	E8
3	B66_L3_P	D8	4	B66_L1_P	F8
5	B66_L7_N	K8	6	B66_L2_N	A9
7	B66_L7_P	L8	8	B66_L2_P	B9

79	GND	–	80	GND	–
81	B68_L16_N	F19	82	B68_L10_N	D18
83	B68_L16_P	G19	84	B68_L10_P	D19
85	B68_L18_N	H18	86	B68_L1_N	A14
87	B68_L18_P	H19	88	B68_L1_P	B14
89	GND	–	90	GND	–
91	B68_L22_N	J18	92	B68_L3_N	A15
93	B68_L22_P	J19	94	B68_L3_P	B15
95	B68_L24_N	L18	96	B68_L5_N	B16
97	B68_L24_P	L19	98	B68_L5_P	B17
99	GND	–	100	GND	–
101	B68_L13_N	G16	102	B68_L7_N	C14
103	B68_L13_P	G17	104	B68_L7_P	D14
105	B68_L14_N	F17	106	B68_L6_N	C17
107	B68_L14_P	F18	108	B68_L6_P	C18
109	GND	–	110	GND	–
111	B68_L12_N	E17	112	B68_L2_N	A18
113	B68_L12_P	E18	114	B68_L2_P	A19
115	B68_L17_N	H16	116	B68_L4_N	B19
117	B68_L17_P	H17	118	B68_L4_P	C19
119	GND	–	120	GND	–

Pin assignment saka konektor J2
J3 minangka sinyal prabédan kacepetan dhuwur saka transceiver BANK224 ~ 226 lan sinyal parsial BANK64, BANK65

J2 Pin	Jeneng Sinyal	Pin FPGA	J2 Pin	Jeneng Sinyal	Pin FPGA
1	GND	–	2	GND	–
3	226_TX2_N	U3	4	226_RX2_N	T1
5	226_TX2_P	U4	6	226_RX2_P	T2
7	GND	–	8	GND	–
9	226_TX3_N	R3	10	226_RX3_N	P1
11	226_TX3_P	R4	12	226_RX3_P	P2
13	GND	–	14	GND	–
15	226_CLK1_N	T5	16	226_CLK0_N	V5
17	226_CLK1_P	T6	18	226_CLK0_P	V6
19	GND	–	20	GND	–

21	227_TX0_P	N4	22	227_RX0_P	M2
23	227_TX0_N	N3	24	227_RX0_N	M1
25	GND	–	26	GND	–
27	227_TX1_P	L4	28	227_RX1_P	K2
29	227_TX1_N	L3	30	227_RX1_N	K1
31	GND	–	32	GND	–
33	227_TX2_P	J4	34	227_RX2_P	H2
35	227_TX2_N	J3	36	227_RX2_N	H1
37	GND	–	38	GND	–
39	227_TX3_P	G4	40	227_RX3_P	F2
41	227_TX3_N	G3	42	227_RX3_N	F1
43	GND	–	44	GND	–
45	227_CLK1_P	M6	46	227_CLK0_P	P6
47	227_CLK1_N	M5	48	227_CLK0_N	P5
49	GND	–	50	GND	–
51	228_TX0_P	F6	52	228_RX0_P	E4
53	228_TX0_N	F5	54	228_RX0_N	E3
55	GND	–	56	GND	–
57	228_TX1_P	D6	58	228_RX1_P	D2
59	228_TX1_N	D5	60	228_RX1_N	D1
61	GND	–	62	GND	–
63	228_TX2_P	C4	64	228_RX2_P	B2
65	228_TX2_N	C3	66	228_RX2_N	B1
67	GND	–	68	GND	–
69	228_TX3_P	B6	70	228_RX3_P	A4
71	228_TX3_N	B5	72	228_RX3_N	A3
73	GND	–	74	GND	–
75	228_CLK1_P	H6	76	228_CLK0_P	K6
77	228_CLK1_N	H5	78	228_CLK0_N	K5
79	GND	–	80	GND	–

Pin assignment saka konektor J3

J3 Pin	Jeneng Sinyal	Pin FPGA	J3 Pin	Jeneng Sinyal	Pin FPGA
1	B64_L7_N	AF13	2	B64_L21_N	AL9

3	B64_L7_P	AE13	4	B64_L21_P	AK10
5	B64_L11_N	AH12	6	B64_L24_N	AL8
7	B64_L11_P	AG12	8	B64_L24_P	AK8
9	GND	L7	10	GND	–
11	B64_L9_N	AF12	12	B64_L12_N	AH11
13	B64_L9_P	AE12	14	B64_L12_P	AG11
15	B64_L13_N	AG10	16	B64_L14_N	AG9
17	B64_L13_P	AF10	18	B64_L14_P	AF9
19	GND	L7	20	GND	–
21	B64_L10_N	AE11	22	B64_L15_N	AF8
23	B64_L10_P	AD11	24	B64_L15_P	AE8
25	B64_L18_N	AH8	26	B64_L16_N	AE10
27	B64_L18_P	AH9	28	B64_L16_P	AD10
29	GND	L7	30	GND	–
31	B64_L17_N	AD8	32	FPGA_TCK	AC9
33	B64_L17_P	AD9	34	FPGA_TDO	U9
35	B64_L23_N	AJ8	36	FPGA_TMS	W9
37	B64_L23_P	AJ9	38	FPGA_TDI	V9
39	GND	L7	40	GND	–
41	B65_T0U	H23	42	B66_T3U	E12
43	B65_T3U	K22	44	B66_T2U	F12
45	B65_T1U	N23	46	B66_T1U	L9
47	B65_T2U	N27	48	NC	–
49	GND	L7	50	GND	–
51	224_TX0_N	AN3	52	224_RX0_N	AP1
53	224_TX0_P	AN4	54	224_RX0_P	AP2
55	GND	L7	56	GND	–
57	224_TX1_N	AM5	58	224_RX1_N	AM1
59	224_TX1_P	AM6	60	224_RX1_P	AM2
61	GND	L7	62	GND	–
63	224_TX2_N	AL3	64	224_RX2_N	AK1
65	224_TX2_P	AL4	66	224_RX2_P	AK2
67	GND	L7	68	GND	–
69	224_TX3_N	AK5	70	224_RX3_N	AJ3
71	224_TX3_P	AK6	72	224_RX3_P	AJ4

73	GND	L7	74	GND	–
75	224_CLK1_N	AD5	76	224_CLK0_N	AF5
77	224_CLK1_P	AD6	78	224_CLK0_P	AF6
79	GND	L7	80	GND	–
81	225_TX0_N	AH5	82	225_RX0_N	AH1
83	225_TX0_P	AH6	84	225_RX0_P	AH2
85	GND	L7	86	GND	–
87	225_TX1_N	AG3	88	225_RX1_N	AF1
89	225_TX1_P	AG4	90	225_RX1_P	AF2
91	GND	L7	92	GND	–
93	225_TX2_N	AE3	94	225_RX2_N	AD1
95	225_TX2_P	AE4	96	225_RX2_P	AD2
97	GND	L7	98	GND	–
99	225_TX3_N	AC3	100	225_RX3_N	AB1
101	225_TX3_P	AC4	102	225_RX3_P	AB2
103	GND	L7	104	GND	–
105	225_CLK1_N	Y5	106	225_CLK0_N	AB5
107	225_CLK1_P	Y6	108	225_CLK0_P	AB6
109	GND	L7	110	GND	–
111	226_TX0_N	AA3	112	226_RX0_N	Y1
113	226_TX0_P	AA4	114	226_RX0_P	Y2
115	GND	L7	116	GND	–
117	226_TX1_N	W3	118	226_RX1_N	V1
119	226_TX1_P	W4	120	226_RX1_P	V2

J4 nyambungake sinyal BANK48 lan sinyal parsial BANK64. Pin assignment saka konektor J4

J4 Pin	Jeneng Sinyal	Pin FPGA	J4 Pin	Jeneng Sinyal	Pin FPGA
1	B48_L8_N	AG34	2	B48_T2U	AA33
3	B48_L8_P	AF33	4	B48_T1U	AE31
5	B48_L7_N	AG32	6	B48_T3U	V32
7	B48_L7_P	AG31	8	B47_T3U	U29
9	GND	–	10	GND	–
11	B48_L10_N	AF34	12	B48_L18_N	AD33
13	B48_L10_P	AE33	14	B48_L18_P	AC33

J4 Pin	Jeneng Sinyal	Pin FPGA	J4 Pin	Jeneng Sinyal	Pin FPGA
1	B48_L8_N	AG34	2	B48_T2U	AA33
3	B48_L8_P	AF33	4	B48_T1U	AE31
5	B48_L7_N	AG32	6	B48_T3U	V32
7	B48_L7_P	AG31	8	B47_T3U	U29
9	GND	–	10	GND	–
11	B48_L10_N	AF34	12	B48_L18_N	AD33
13	B48_L10_P	AE33	14	B48_L18_P	AC33

85	NC	–	86	NC	–
87	NC	–	88	POWER_PG	–
89	GND	–	90	GND	–
91	B64_L8_N	AJ13	92	B64_T1U	AJ11
93	B64_L8_P	AH13	94	B64_T3U	AM9
95	B64_L6_N	AL13	96	B64_T0U	AK11
97	B64_L6_P	AK13	98	B64_T2U	AJ10
99	GND	–	100	GND	–
101	B64_L1_N	AP10	102	B64_L2_N	AP13
103	B64_L1_P	AP11	104	B64_L2_P	AN13
105	B64_L4_N	AN12	106	B64_L22_N	AP8
107	B64_L4_P	AM12	108	B64_L22_P	AN8
109	GND	–	110	GND	–
111	B64_L20_N	AP9	112	B64_L19_N	AM10
113	B64_L20_P	AN9	114	B64_L19_P	AL10
115	B64_L3_N	AN11	116	B64_L5_N	AL12
117	B64_L3_P	AM11	118	B64_L5_P	AK12
119	GND	–	120	GND	–

J5 nyambungake sinyal BANK47 lan sinyal parsial BANK65. Pin assignment saka konektor J5

J5 Pin	Jeneng Sinyal	Pin FPGA	J5 Pin	Jeneng Sinyal	Pin FPGA
1	B65_L10_N	K23	2	NC	–
3	B65_L10_P	L22	4	NC	–
5	B65_L6_N	H24	6	B65_L23_N	M21
7	B65_L6_P	J23	8	B65_L23_P	N21
9	GND	L7	10	GND	–
11	B65_L19_N	M22	12	NC	–
13	B65_L19_P	N22	14	B65_L2_P	G25
15	B65_L9_N	K25	16	B65_L1_N	G27
17	B65_L9_P	L25	18	B65_L1_P	H27
19	GND	L7	20	GND	–
21	B65_L24_N	K21	22	B65_L5_N	H26
23	B65_L24_P	K20	24	B65_L5_P	J26
25	B65_L12_N	M24	26	B65_L4_N	J25

27	B65_L12_P	N24	28	B65_L4_P	J24
29	GND	L7	30	GND	–
31	B65_L20_N	P21	32	B65_L3_N	K27
33	B65_L20_P	P20	34	B65_L3_P	K26
35	B65_L7_N	L27	36	B65_L11_N	M26
37	B65_L7_P	M27	38	B65_L11_P	M25
39	GND	L7	40	GND	–
41	B65_L13_N	N26	42	B65_L18_N	P23
43	B65_L13_P	P26	44	B65_L18_P	R23
45	B65_L14_N	P25	46	B65_L15_N	R27
47	B65_L14_P	P24	48	B65_L15_P	T27
49	GND	–	50	GND	–
51	B65_L8_N	L24	52	B65_L17_N	R26
53	B65_L8_P	L23	54	B65_L17_P	R25
55	NC	–	56	B65_L16_N	T25
57	NC	–	58	B65_L16_P	T24
59	GND	L7	60	GND	–
61	B47_L11_N	AA23	62	B47_L19_N	V28
63	B47_L11_P	Y23	64	B47_L19_P	V27
65	B47_L14_N	Y25	66	B47_L22_N	U27
67	B47_L14_P	W25	68	B47_L22_P	U26
69	GND	–	70	GND	–
71	B47_L7_N	AB22	72	B47_L20_N	U25
73	B47_L7_P	AA22	74	B47_L20_P	U24
75	B47_L21_N	Y28	76	B47_L17_N	T23
77	B47_L21_P	W28	78	B47_L17_P	T22
79	GND	–	80	GND	–
81	B47_L3_N	AC24	82	B47_L15_N	U22
83	B47_L3_P	AB24	84	B47_L15_P	U21
85	B47_L23_N	W29	86	B47_L24_N	W26
87	B47_L23_P	V29	88	B47_L24_P	V26
89	GND	–	90	GND	–
91	B47_L10_N	AC21	92	B47_L13_N	W24
93	B47_L10_P	AB21	94	B47_L13_P	W23
95	B47_L5_N	AB27	96	B47_L1_N	Y27

97	B47_L5_P	AA27	98	B47_L1_P	Y26
99	GND	–	100	GND	–
101	B47_L9_N	AB20	102	B47_L12_N	AA25
103	B47_L9_P	AA20	104	B47_L12_P	AA24
105	B47_L4_N	AC27	106	B47_L6_N	AB26
107	B47_L4_P	AC26	108	B47_L6_P	AB25
109	GND	–	110	GND	–
111	B47_L8_N	AC23	112	B47_L16_N	V23
113	B47_L8_P	AC22	114	B47_L16_P	V22
115	B47_L2_N	AD26	116	B47_L18_N	W21
117	B47_L2_P	AD25	118	B47_L18_P	V21
119	GND	–	120	GND	–

J6 nyambungake daya 12V, sinyal BANK66, lan sinyal parsial BANK68. Pin assignment saka konektor J6

J6 Pin	Jeneng Sinyal	Pin FPGA	J6 Pin	Jeneng Sinyal	Pin FPGA
1	+12V	–	2	+12V	–
3	+12V	–	4	+12V	–
5	+12V	–	6	+12V	–
7	+12V	–	8	+12V	–
9	+12V	–	10	+12V	–
11	GND	–	12	GND	–
13	B67_L17_N	A20	14	B67_L8_N	A25
15	B67_L17_P	B20	16	B67_L8_P	B25
17	B67_L16_N	C22	18	B67_L6_N	A28
19	B67_L16_P	C21	20	B67_L6_P	A27
21	GND	–	22	GND	–
23	B67_L15_N	B22	24	B67_L13_N	C23
25	B67_L15_P	B21	26	B67_L13_P	D23
27	B67_L11_N	D25	28	B67_L12_N	C24
29	B67_L11_P	E25	30	B67_L12_P	D24
31	GND	–	32	GND	–
33	B67_L18_N	D21	34	B67_L4_N	A29
35	B67_L18_P	D20	36	B67_L4_P	B29
37	B67_L20_N	E21	38	B67_L2_N	B27

39	B67_L20_P	E20	40	B67_L2_P	C27
41	GND	–	42	GND	–
43	B67_L14_N	E23	44	B67_L1_N	E27
45	B67_L14_P	E22	46	B67_L1_P	F27
47	B67_L22_N	F20	48	B67_L10_N	A24
49	B67_L22_P	G20	50	B67_L10_P	B24
51	GND	–	52	GND	–
53	B67_L19_N	F25	54	B67_L9_N	B26
55	B67_L19_P	G24	56	B67_L9_P	C26
57	B67_L24_N	G21	58	B67_L5_N	C28
59	B67_L24_P	H21	60	B67_L5_P	D28
61	GND	–	62	GND	–
63	B67_L21_N	F24	64	B67_L3_N	D29
65	B67_L21_P	F23	66	B67_L3_P	E28
67	B67_L23_N	F22	68	B67_L7_N	D26
69	B67_L23_P	G22	70	B67_L7_P	E26
71	GND	–	72	GND	–
73	B68_T1U	C16	74	B67_T1U	A23
75	B68_T2U	H14	76	B67_T2U	A22
77	B68_T3U	L17	78	B67_T3U	H22
79	NC	–	80	NC	–

Bagean 2: Papan Carrier

Bagean 2.1: Pambuka

Liwat introduksi fungsi sadurungé, sampeyan bisa ngerti fungsi saka bagean Papan operator.

Antarmuka serat 2 saluran
1-saluran antarmuka PCIEx8
Antarmuka UART USB 1 saluran
1-saluran Ethernet RJ45 antarmuka
3-Channel antarmuka FMC
1-saluran slot kertu Micro SD
2-saluran SMA antarmuka
EEPROM, sensor suhu lan kelembapan
JTAG antarmuka debugging
7 lampu LED
2 Tombol

Part 2.2: antarmuka PCIE X8
Papan pangembangan AXKU042 dilengkapi antarmuka PCIe3.0 x 8 kanggo nyambungake 8 pasangan transceiver menyang driji emas PCIEx8, bisa mujudake komunikasi data PCIEex8, PCIEex4, PCIex2, lan PCIex1. Sinyal ngirim lan nampa antarmuka PCIe langsung disambungake menyang transceiver GTP saka FPGA. Wolung saluran sinyal TX lan RX disambungake menyang FPGA ing sinyal diferensial, lan tingkat komunikasi saluran siji bisa nganti bandwidth 8Gbps. Diagram desain antarmuka PCIe saka Papan pangembangan AXKU042 FPGA kapacak ing Figure 2-2-1, ngendi TX ngirim sinyal lan sinyal CLK jam referensi disambungake ing mode AC gegandhengan.

PCIe x8 Antarmuka Pin Assignment

Jeneng Sinyal	Jeneng Pin FPGA	Pin Nomer	Katrangan
PCIE_RX0_N	MGTHRXN3_225	AB1	saluran PCIE 0 Data ngirim Negative
PCIE_RX0_P	MGTHRXP3_225	AB2	saluran PCIE 0 Data Transmit Positif
PCIE_RX1_N	MGTHRXN2_225	AD1	saluran PCIE 1 Data ngirim Negative
PCIE_RX1_P	MGTHRXP2_225	AD2	saluran PCIE 1 Data Transmit Positif
PCIE_RX2_N	MGTHRXN1_225	AF1	saluran PCIE 2 Data ngirim Negative
PCIE_RX2_P	MGTHRXP1_225	AF2	saluran PCIE 2 Data Transmit Positif
PCIE_RX3_N	MGTHRXN0_225	AH1	saluran PCIE 3 Data ngirim Negative
PCIE_RX3_P	MGTHRXP0_225	AH2	saluran PCIE 3 Data Transmit Positif
PCIE_RX4_N	MGTHRXN3_224	AJ3	saluran PCIE 4 Data ngirim Negative
PCIE_RX4_P	MGTHRXP3_224	AJ4	saluran PCIE 4 Data Transmit Positif
PCIE_RX5_N	MGTHRXN2_224	AK1	saluran PCIE 5 Data ngirim Negative
PCIE_RX5_P	MGTHRXP2_224	AK2	saluran PCIE 5 Data Transmit Positif
PCIE_RX6_N	MGTHRXN1_224	AM1	saluran PCIE 6 Data ngirim Negative
PCIE_RX6_P	MGTHRXP1_224	AM2	saluran PCIE 6 Data Transmit Positif
PCIE_RX7_N	MGTHRXN0_224	AP1	saluran PCIE 7 Data ngirim Negative
PCIE_RX7_P	MGTHRXP0_224	AP2	saluran PCIE 7 Data Transmit Positif
PCIE_TX0_N	MGTHTXN3_225	AC3	saluran PCIE 0 Data ngirim Negative
PCIE_TX0_P	MGTHTXP3_225	AC4	saluran PCIE 0 Data Transmit Positif
PCIE_TX1_N	MGTHTXN2_225	AE3	saluran PCIE 1 Data ngirim Negative
PCIE_TX1_P	MGTHTXP2_225	AE4	saluran PCIE 1 Data Transmit Positif
PCIE_TX2_N	MGTHTXN1_225	AG3	saluran PCIE 2 Data ngirim Negative
PCIE_TX2_P	MGTHTXP1_225	AG4	saluran PCIE 2 Data Transmit Positif
PCIE_TX3_N	MGTHTXN0_225	AH5	saluran PCIE 3 Data ngirim Negative
PCIE_TX3_P	MGTHTXP0_225	AH6	saluran PCIE 3 Data Transmit Positif
PCIE_TX4_N	MGTHTXN3_224	AK5	saluran PCIE 4 Data ngirim Negative
PCIE_TX4_P	MGTHTXP3_224	AK6	saluran PCIE 4 Data Transmit Positif
PCIE_TX5_N	MGTHTXN2_224	AL3	saluran PCIE 5 Data ngirim Negative
PCIE_TX5_P	MGTHTXP2_224	AL4	saluran PCIE 5 Data Transmit Positif
PCIE_TX6_N	MGTHTXN1_224	AM5	saluran PCIE 6 Data ngirim Negative
PCIE_TX6_P	MGTHTXP1_224	AM6	saluran PCIE 6 Data Transmit Positif
PCIE_TX7_N	MGTHTXN0_224	AN3	saluran PCIE 7 Data ngirim Negative
PCIE_TX7_P	MGTHTXP0_224	AN4	saluran PCIE 7 Data Transmit Positif
PCIE_CLK_N	MGTREFCLK0N_225	AB5	Saluran PCIE Referensi Jam Negatif
PCIE_CLK_P	MGTREFCLK0P_225	AB6	Saluran PCIE Referensi Jam Positif
PCIE_PERST	IO_T3U_N12_PERSTN0_65	K22	Sinyal Reset kertu PCIE

Bagean 2.3: Antarmuka serat optik SFP +

Papan pangembangan AXKU042 FPGA duwe loro antarmuka SFP. Pangguna bisa tuku modul optik SFP (1.25G, 2.5G, 10G modul optik ing pasar) lan masang menyang iki 2 antarmuka serat optik kanggo komunikasi data serat optik. 2 antarmuka serat optik disambungake karo 2 RX/TX transceiver FPGA BANK226 GTH. Sinyal TX lan sinyal RX disambungake menyang FPGA lan modul optik liwat kapasitor pamblokiran DC ing mode sinyal diferensial, lan tingkat data saben transmisi TX lan panrima RX nganti 16.3Gb / s. Jam referensi saka transceiver GXH saka BANK226 diwenehake dening osilator kristal diferensial 156.25M.

Diagram desain serat FPGA lan SFP ditampilake ing Gambar 2-3-1 ing ngisor iki

Gambar 2-3-1 diagram skematis Serat SFP
Asset pin FPGA antarmuka serat 1 yaiku kaya ing ngisor iki:

Jeneng Sinyal	Pin FPGA	Katrangan
SFP1_TX_P	U4	SFP Optical Modul Data Transmit Positif
SFP1_TX_N	U3	SFP Optical Modul Data ngirim Negative
SFP1_RX_P	T2	SFP Optical Modul Data Transmit Positif
SFP1_RX_N	T1	SFP Optical Modul Data ngirim Negative
SFP1_TX_DIS	AN11	Transfer modul optik SFP Pateni, aktif dhuwur
SFP1_LOSS	AP9	LOSS optik cahya SFP, Tingkat dhuwur tegese ora ana sinyal cahya sing ditampa

2. serat antarmuka FPGA pin assignment minangka nderek

Jeneng Sinyal	Pin FPGA	Katrangan
SFP2_TX_P	W4	SFP Optical Modul Data Transmit Positif

SFP2_TX_N	W3	SFP Optical Modul Data ngirim Negative
SFP2_RX_P	V2	SFP Optical Modul Data Transmit Positif
SFP2_RX_N	V1	SFP Optical Modul Data ngirim Negative
SFP2_TX_DIS	AM11	Transfer modul optik SFP Pateni, aktif dhuwur
SFP2_LOSS	AN9	LOSS optik cahya SFP, Tingkat dhuwur tegese ora ana sinyal cahya sing ditampa

Part 2.4: Antarmuka Gigabit Ethernet Ana 1 port Gigabit Ethernet ing Papan Pangembangan AXKU042 FPGA. Chip GPHY nggunakake chip KSZ9031RNX Ethernet PHY Micrel kanggo nyedhiyakake layanan komunikasi jaringan kanggo pangguna. Chip KSZ9031RNX ndhukung tingkat transmisi jaringan 10/100/1000 Mbps lan komunikasi karo lapisan MAC saka sistem liwat antarmuka RGMII. KSZ9031RNX ndhukung adaptasi MDI / MDX, macem-macem adaptasi kacepetan, adaptasi Master / Budak, lan ndhukung bus MDIO kanggo manajemen register PHY. Nalika KSZ9031RNX diuripake, bakal ndeteksi status level sawetara IO tartamtu kanggo nemtokake mode operasi dhewe. Tabel 3-5-1 nggambarake setelan gawan sawise chip GPHY diuripake.

Pin Konfigurasi	Katrangan	Nilai konfigurasi
PHYAD[2:0]	Alamat PHY mode MDIO/MDC	Alamat PHY 为 011
CLK125_EN	Aktifake pilihan output jam 125Mhz	Aktifake
LED_MODE	Konfigurasi mode cahya LED	Mode lampu LED tunggal
MODE0 ~ MODE3	Adaptasi link lan duplex lengkap konfigurasi	10/100/1000 adaptif, kompatibel kanthi full-duplex, half-duplex

Nalika jaringan disambungake menyang Gigabit Ethernet, transmisi data chip FPGA lan chip PHY KSZ9031RNX disampekno liwat bus RGMII, jam transmisi 125Mhz, lan data kasebut s.ampmimpin ing pinggiran munggah lan Mudhun samples saka jam. Nalika jaringan disambungake menyang 100M Ethernet, transmisi data saka chip FPGA lan chip PHY KSZ9031RNX disampekno liwat bis RMII, lan jam transmisi 25Mhz. Data punika sampmimpin ing pinggiran munggah lan Mudhun samples saka jam. Diagram sambungan chip Ethernet PHY kaya sing ditampilake ing Gambar 2-4-1:

Gambar 2-4-1 diagram skematis
Tugas pin antarmuka Gigabit Ethernet kaya ing ngisor iki:

Jeneng Sinyal	Jeneng Pin FPGA	Pin No.	Katrangan
PHY_GTXC	B48_L21_N	W34	Ethernet 1 Ngirim Jam
PHY_TXD0	B48_L18_N	AD33	Ethernet 1 Ngirim Data bit０
PHY_TXD1	B48_L18_P	AC33	Ethernet 1 Ngirim Data bit1
PHY_TXD2	B48_L23_N	V34	Ethernet 1 Ngirim Data bit2
PHY_TXD3	B48_L23_P	U34	Ethernet 1 Ngirim Data bit3
PHY_TXEN	B48_L21_P	V33	Ethernet 1 Ngirim Sinyal Aktifake
PHY_RXC	B48_L12_P	AC31	Ethernet 1 Nampa Jam
PHY_RXD3	B48_L17_N	AB34	Ethernet 1 Nampa Data Bit0
PHY_RXD2	B48_L17_P	AA34	Ethernet 1 Nampa Data Bit1
PHY_RXD1	B48_L15_N	AD34	Ethernet 1 Nampa Data Bit2
PHY_RXD0	B48_L15_P	AC34	Ethernet 1 Nampa Data Bit3
PHY_RXDV	B48_L12_N	AC32	Ethernet 1 Nampa Sinyal Aktifake
PHY_MDC	B48_T2U	AA33	Jam Manajemen Ethernet 1MDIO
PHY_MDIO	B48_T1U	AE31	Data Manajemen Ethernet 1MDIO
PHY_RESET	B48_T3U	V32	Ethernet Chip Reset

Part 2.5: USB kanggo Port Serial
Papan pangembangan AXKU042 FPGA dilengkapi antarmuka UART kanggo USB kanggo komunikasi serial lan debugging papan pangembangan. Chip konversi nggunakake chip USB-UAR saka Silicon Labs CP2102GM. Chip serial CP2102 lan FPGA disambungake dening chip level-shifting kanggo adaptasi karo FPGA BANK vol sing beda.tages. Antarmuka USB nggunakake antarmuka USB MINI, sing bisa disambungake menyang port USB ing PC ndhuwur kanggo komunikasi data serial ing papan pangembangan FPGA nganggo kabel USB. Diagram skematis saka desain sirkuit USB Uart kapacak ing ngisor iki ing Tabel 6-1:

Figure 2-5-1 USB kanggo port serial diagram skematis USB kanggo port serial pin assignment

Jeneng Sinyal	Jeneng Pin FPGA	Pin Nomer	Katrangan
UART_RXD	B64_T1U	AJ11	Input Data Uart
UART_TXD	B64_T3U	AM9	Output Data Uart

Part 2.6: Port Expansion FMC
Papan pangembangan AXKU042 FPGA dilengkapi rong port ekspansi FMC LPC standar lan siji port ekspansi FMC HPC standar sing bisa disambungake menyang macem-macem modul FMC XILINX utawa ALINX (modul input lan output HDMI, modul kamera binokular, modul AD kacepetan dhuwur, lsp. .). Port ekspansi LPC FMC1 duwe 36 pasangan sinyal diferensial, sing disambungake menyang IO saka BANK47 lan BANK48 saka chip FPGA. Tingkat IO saka BANK47 lan BANK48 yaiku 1.8V lan ora bisa diowahi.

Sinyal transceiver GTH kacepetan 1 pasangan disambungake menyang BNAK226. Port ekspansi LPC FMC2 duwe 36 pasangan sinyal diferensial, sing disambungake menyang IO saka BANK64 lan BANK65 saka chip FPGA. Standar tingkat ditemtokake dening voltage VADJ saka BANK, lan standar 3.3V. Port ekspansi FMC HPC ngemot 58 pasangan sinyal IO diferensial, sing disambungake menyang chip FPGA BANK66, BANK67, lan BANK68, lan vol.tage standar punika 1.8V. 8 sinyal transceiver GTH kacepetan dhuwur disambungake menyang IO saka chip FPGA BANK227 lan BANK228. Diagram skematik konektor FPGA lan FMC LPC ditampilake ing Gambar 2-6-1, 2-6-2, lan 2-6-3:

Gambar 2-6-3 diagram skematik HPC FMC3
Tugas Pin Konektor LPC FMC 1

Jeneng Sinyal	Jeneng Pin	Pin No.	Katrangan
FMC1_LPC_CLK0_N	B47_L11_N	AA23	Referensi FMC Referensi 1 Jam N
FMC1_LPC_CLK0_P	B47_L11_P	Y23	Referensi FMC Referensi 1 Jam P
FMC1_LPC_CLK1_N	B48_L14_N	AB31	Referensi FMC Referensi kaping 2 Jam N
FMC1_LPC_CLK1_P	B48_L14_P	AB30	Referensi FMC Referensi kaping 2 Jam P
FMC1_LPC_LA00_CC_N	B47_L13_N	W24	Referensi FMC Data kaping 0 ( Jam ) N
FMC1_LPC_LA00_CC_P	B47_L13_P	W23	Referensi FMC Data kaping 0 ( Jam ) P
FMC1_LPC_LA01_CC_N	B47_L12_N	AA25	Referensi FMC Data 1 ( Jam ) N
FMC1_LPC_LA01_CC_P	B47_L12_P	AA24	Referensi FMC Data 1 ( Jam ) P
FMC1_LPC_LA02_N	B47_L18_N	W21	Referensi FMC Data 2 N
FMC1_LPC_LA02_P	B47_L18_P	V21	Referensi FMC Data 2 P
FMC1_LPC_LA03_N	B47_L16_N	V23	Referensi FMC Data 3rd N
FMC1_LPC_LA03_P	B47_L16_P	V22	Referensi FMC Data kaping 3 P
FMC1_LPC_LA04_N	B47_L6_N	AB26	Referensi FMC Data 4 N
FMC1_LPC_LA04_P	B47_L6_P	AB25	Referensi FMC Data 4 P
FMC1_LPC_LA05_N	B47_L23_N	W29	Referensi FMC Data 5 N
FMC1_LPC_LA05_P	B47_L23_P	V29	Referensi FMC Data 5 P
FMC1_LPC_LA06_N	B47_L1_N	Y27	Referensi FMC Data 6 N
FMC1_LPC_LA06_P	B47_L1_P	Y26	Referensi FMC Data 6 P
FMC1_LPC_LA07_N	B47_L15_N	U22	Referensi FMC Data 7 N
FMC1_LPC_LA07_P	B47_L15_P	U21	Referensi FMC Data 7 P
FMC1_LPC_LA08_N	B47_L24_N	W26	Referensi FMC Data 8 N
FMC1_LPC_LA08_P	B47_L24_P	V26	Referensi FMC Data 8 P

FMC1_LPC_LA09_N	B47_L17_N	T23	Referensi FMC Data 9 N
FMC1_LPC_LA09_P	B47_L17_P	T22	Referensi FMC Data 9 P
FMC1_LPC_LA10_N	B47_L20_N	U25	Referensi FMC Data 10 N
FMC1_LPC_LA10_P	B47_L20_P	U24	Referensi FMC Data 10 P
FMC1_LPC_LA11_N	B47_L3_N	AC24	Referensi FMC Data 11 N
FMC1_LPC_LA11_P	B47_L3_P	AB24	Referensi FMC Data 11 P
FMC1_LPC_LA12_N	B47_L22_N	U27	Referensi FMC Data 12 N
FMC1_LPC_LA12_P	B47_L22_P	U26	Referensi FMC Data 12 P
FMC1_LPC_LA13_N	B47_L21_N	Y28	Referensi FMC Data 13 N
FMC1_LPC_LA13_P	B47_L21_P	W28	Referensi FMC Data 13 P
FMC1_LPC_LA14_N	B47_L19_N	V28	Referensi FMC Data 14 N
FMC1_LPC_LA14_P	B47_L19_P	V27	Referensi FMC Data 14 P
FMC1_LPC_LA15_N	B47_L14_N	Y25	Referensi FMC Data 15 N
FMC1_LPC_LA15_P	B47_L14_P	W25	Referensi FMC Data 15 P
FMC1_LPC_LA16_N	B47_L7_N	AB22	Referensi FMC Data 16 N
FMC1_LPC_LA16_P	B47_L7_P	AA22	Referensi FMC Data 16 P
FMC1_LPC_LA17_CC_N	B48_L13_N	AB32	Referensi FMC Data kaping 17 (jam) N
FMC1_LPC_LA17_CC_P	B48_L13_P	AA32	Referensi FMC Data kaping 17 (jam)P
FMC1_LPC_LA18_CC_N	B48_L11_N	AD31	Referensi FMC Data kaping 18 (jam) N
FMC1_LPC_LA18_CC_P	B48_L11_P	AD30	Referensi FMC Data kaping 18 (jam)P
FMC1_LPC_LA19_N	B48_L16_N	AB29	Referensi FMC Data 19 N
FMC1_LPC_LA19_P	B48_L16_P	AA29	Referensi FMC Data 19 P
FMC1_LPC_LA20_N	B48_L24_N	W31	Referensi FMC Data 20 N
FMC1_LPC_LA20_P	B48_L24_P	V31	Referensi FMC Data 20 P
FMC1_LPC_LA21_N	B48_L6_N	AG30	Referensi FMC Data 21 N
FMC1_LPC_LA21_P	B48_L6_P	AF30	Referensi FMC Data 21 P
FMC1_LPC_LA22_N	B48_L5_N	AE30	Referensi FMC Data 22 N
FMC1_LPC_LA22_P	B48_L5_P	AD29	Referensi FMC Data 22 P
FMC1_LPC_LA23_N	B48_L8_N	AG34	Referensi FMC 23rd Data N
FMC1_LPC_LA23_P	B48_L8_P	AF33	Referensi FMC Data kaping 23 P
FMC1_LPC_LA24_N	B48_L4_N	AG29	Referensi FMC Data 24 N
FMC1_LPC_LA24_P	B48_L4_P	AF29	Referensi FMC Data 24 P
FMC1_LPC_LA25_N	B48_L9_N	AF32	Referensi FMC Data 25 N
FMC1_LPC_LA25_P	B48_L9_P	AE32	Referensi FMC Data 25 P
FMC1_LPC_LA26_N	B48_L7_N	AG32	Referensi FMC Data 26 N
FMC1_LPC_LA26_P	B48_L7_P	AG31	Referensi FMC Data 26 P
FMC1_LPC_LA27_N	B48_L10_N	AF34	Referensi FMC Data 27 N
FMC1_LPC_LA27_P	B48_L10_P	AE33	Referensi FMC Data 27 N
FMC1_LPC_LA28_N	B48_L1_N	AF27	Referensi FMC Data 28 N
FMC1_LPC_LA28_P	B48_L1_P	AE27	Referensi FMC Data 28 P
FMC1_LPC_LA29_N	B48_L2_N	AF28	Referensi FMC Data 29 N
FMC1_LPC_LA29_P	B48_L2_P	AE28	Referensi FMC Data 29 P
FMC1_LPC_LA30_N	B48_L3_N	AD28	Referensi FMC Data 30 N
FMC1_LPC_LA30_P	B48_L3_P	AC28	Referensi FMC Data 30 P
FMC1_LPC_LA31_N	B48_L19_N	Y33	Referensi FMC Data 31 N
FMC1_LPC_LA31_P	B48_L19_P	W33	Referensi FMC Data 31 P
FMC1_LPC_LA32_N	B48_L22_N	Y32	Referensi FMC Data 32 N
FMC1_LPC_LA32_P	B48_L22_P	Y31	Referensi FMC Data 32 P

FMC1_LPC_LA09_N	B47_L17_N	T23	Referensi FMC Data 9 N
FMC1_LPC_LA09_P	B47_L17_P	T22	Referensi FMC Data 9 P
FMC1_LPC_LA10_N	B47_L20_N	U25	Referensi FMC Data 10 N
FMC1_LPC_LA10_P	B47_L20_P	U24	Referensi FMC Data 10 P
FMC1_LPC_LA11_N	B47_L3_N	AC24	Referensi FMC Data 11 N
FMC1_LPC_LA11_P	B47_L3_P	AB24	Referensi FMC Data 11 P
FMC1_LPC_LA12_N	B47_L22_N	U27	Referensi FMC Data 12 N
FMC1_LPC_LA12_P	B47_L22_P	U26	Referensi FMC Data 12 P
FMC1_LPC_LA13_N	B47_L21_N	Y28	Referensi FMC Data 13 N
FMC1_LPC_LA13_P	B47_L21_P	W28	Referensi FMC Data 13 P
FMC1_LPC_LA14_N	B47_L19_N	V28	Referensi FMC Data 14 N
FMC1_LPC_LA14_P	B47_L19_P	V27	Referensi FMC Data 14 P
FMC1_LPC_LA15_N	B47_L14_N	Y25	Referensi FMC Data 15 N
FMC1_LPC_LA15_P	B47_L14_P	W25	Referensi FMC Data 15 P
FMC1_LPC_LA16_N	B47_L7_N	AB22	Referensi FMC Data 16 N
FMC1_LPC_LA16_P	B47_L7_P	AA22	Referensi FMC Data 16 P
FMC1_LPC_LA17_CC_N	B48_L13_N	AB32	Referensi FMC Data kaping 17 (jam) N
FMC1_LPC_LA17_CC_P	B48_L13_P	AA32	Referensi FMC Data kaping 17 (jam)P
FMC1_LPC_LA18_CC_N	B48_L11_N	AD31	Referensi FMC Data kaping 18 (jam) N
FMC1_LPC_LA18_CC_P	B48_L11_P	AD30	Referensi FMC Data kaping 18 (jam)P
FMC1_LPC_LA19_N	B48_L16_N	AB29	Referensi FMC Data 19 N
FMC1_LPC_LA19_P	B48_L16_P	AA29	Referensi FMC Data 19 P
FMC1_LPC_LA20_N	B48_L24_N	W31	Referensi FMC Data 20 N
FMC1_LPC_LA20_P	B48_L24_P	V31	Referensi FMC Data 20 P
FMC1_LPC_LA21_N	B48_L6_N	AG30	Referensi FMC Data 21 N
FMC1_LPC_LA21_P	B48_L6_P	AF30	Referensi FMC Data 21 P
FMC1_LPC_LA22_N	B48_L5_N	AE30	Referensi FMC Data 22 N
FMC1_LPC_LA22_P	B48_L5_P	AD29	Referensi FMC Data 22 P
FMC1_LPC_LA23_N	B48_L8_N	AG34	Referensi FMC 23rd Data N
FMC1_LPC_LA23_P	B48_L8_P	AF33	Referensi FMC Data kaping 23 P
FMC1_LPC_LA24_N	B48_L4_N	AG29	Referensi FMC Data 24 N
FMC1_LPC_LA24_P	B48_L4_P	AF29	Referensi FMC Data 24 P
FMC1_LPC_LA25_N	B48_L9_N	AF32	Referensi FMC Data 25 N
FMC1_LPC_LA25_P	B48_L9_P	AE32	Referensi FMC Data 25 P
FMC1_LPC_LA26_N	B48_L7_N	AG32	Referensi FMC Data 26 N
FMC1_LPC_LA26_P	B48_L7_P	AG31	Referensi FMC Data 26 P
FMC1_LPC_LA27_N	B48_L10_N	AF34	Referensi FMC Data 27 N
FMC1_LPC_LA27_P	B48_L10_P	AE33	Referensi FMC Data 27 N
FMC1_LPC_LA28_N	B48_L1_N	AF27	Referensi FMC Data 28 N
FMC1_LPC_LA28_P	B48_L1_P	AE27	Referensi FMC Data 28 P
FMC1_LPC_LA29_N	B48_L2_N	AF28	Referensi FMC Data 29 N
FMC1_LPC_LA29_P	B48_L2_P	AE28	Referensi FMC Data 29 P
FMC1_LPC_LA30_N	B48_L3_N	AD28	Referensi FMC Data 30 N
FMC1_LPC_LA30_P	B48_L3_P	AC28	Referensi FMC Data 30 P
FMC1_LPC_LA31_N	B48_L19_N	Y33	Referensi FMC Data 31 N
FMC1_LPC_LA31_P	B48_L19_P	W33	Referensi FMC Data 31 P
FMC1_LPC_LA32_N	B48_L22_N	Y32	Referensi FMC Data 32 N
FMC1_LPC_LA32_P	B48_L22_P	Y31	Referensi FMC Data 32 P

2. FMC LPC konektor pin assignment minangka nderek

Jeneng Sinyal	Jeneng Pin	Pin No.	Katrangan
FMC2_LPC_CLK0_N	B65_L13_N	N26	Referensi FMC Referensi 1 Jam N
FMC2_LPC_CLK0_P	B65_L13_P	P26	Referensi FMC Referensi 1 Jam P
FMC2_LPC_CLK1_N	B64_L11_N	AH12	Referensi FMC Referensi kaping 2 Jam N
FMC2_LPC_CLK1_P	B64_L11_P	AG12	Referensi FMC Referensi kaping 2 Jam P
FMC2_LPC_LA00_CC_N	B65_L14_N	P25	Referensi FMC Data kaping 0 ( Jam ) N
FMC2_LPC_LA00_CC_P	B65_L14_P	P24	Referensi FMC Data kaping 0 ( Jam ) P
FMC2_LPC_LA01_CC_N	B65_L11_N	M26	Referensi FMC Data 1 ( Jam ) N
FMC2_LPC_LA01_CC_P	B65_L11_P	M25	Referensi FMC Data 1 ( Jam ) P
FMC2_LPC_LA02_N	B65_L17_N	R26	Referensi FMC Data 2 N
FMC2_LPC_LA02_P	B65_L17_P	R25	Referensi FMC Data 2 P
FMC2_LPC_LA03_N	B65_L7_N	L27	Referensi FMC Data 3rd N
FMC2_LPC_LA03_P	B65_L7_P	M27	Referensi FMC Data kaping 3 P
FMC2_LPC_LA04_N	B65_L15_N	R27	Referensi FMC Data 4 N
FMC2_LPC_LA04_P	B65_L15_P	T27	Referensi FMC Data 4 P
FMC2_LPC_LA05_N	B65_L4_N	J25	Referensi FMC Data 5 N
FMC2_LPC_LA05_P	B65_L4_P	J24	Referensi FMC Data 5 P
FMC2_LPC_LA06_N	B65_L3_N	K27	Referensi FMC Data 6 N
FMC2_LPC_LA06_P	B65_L3_P	K26	Referensi FMC Data 6 P
FMC2_LPC_LA07_N	B65_L5_N	H26	Referensi FMC Data 7 N
FMC2_LPC_LA07_P	B65_L5_P	J26	Referensi FMC Data 7 P
FMC2_LPC_LA08_N	B65_L18_N	P23	Referensi FMC Data 8 N
FMC2_LPC_LA08_P	B65_L18_P	R23	Referensi FMC Data 8 P
FMC2_LPC_LA09_N	B65_L1_N	G27	Referensi FMC Data 9 N
FMC2_LPC_LA09_P	B65_L1_P	H27	Referensi FMC Data 9 P
FMC2_LPC_LA10_N	B65_L20_N	P21	Referensi FMC Data 10 N
FMC2_LPC_LA10_P	B65_L20_P	P20	Referensi FMC Data 10 P
FMC2_LPC_LA11_N	B65_L9_N	K25	Referensi FMC Data 11 N
FMC2_LPC_LA11_P	B65_L9_P	L25	Referensi FMC Data 11 P
FMC2_LPC_LA12_N	B65_L12_N	M24	Referensi FMC Data 12 N
FMC2_LPC_LA12_P	B65_L12_P	N24	Referensi FMC Data 12 P
FMC2_LPC_LA13_N	B65_L19_N	M22	Referensi FMC Data 13 N
FMC2_LPC_LA13_P	B65_L19_P	N22	Referensi FMC Data 13 P
FMC2_LPC_LA14_N	B65_L23_N	M21	Referensi FMC Data 14 N
FMC2_LPC_LA14_P	B65_L23_P	N21	Referensi FMC Data 14 P
FMC2_LPC_LA15_N	B65_L10_N	K23	Referensi FMC Data 15 N
FMC2_LPC_LA15_P	B65_L10_P	L22	Referensi FMC Data 15 P
FMC2_LPC_LA16_N	B65_L6_N	H24	Referensi FMC Data 16 N
FMC2_LPC_LA16_P	B65_L6_P	J23	Referensi FMC Data 16 P

FMC2_LPC_LA17_CC_N	B64_L13_N	AG10	Referensi FMC Data kaping 17 (jam) N
FMC2_LPC_LA17_CC_P	B64_L13_P	AF10	Referensi FMC Data kaping 17 (jam)P
FMC2_LPC_LA18_CC_N	B64_L12_N	AH11	Referensi FMC Data kaping 18 (jam) N
FMC2_LPC_LA18_CC_P	B64_L12_P	AG11	Referensi FMC Data kaping 18 (jam)P
FMC2_LPC_LA19_N	B64_L17_N	AD8	Referensi FMC Data 19 N
FMC2_LPC_LA19_P	B64_L17_P	AD9	Referensi FMC Data ke-19 P
FMC2_LPC_LA20_N	B64_L23_N	AJ8	Referensi FMC Data 20 N
FMC2_LPC_LA20_P	B64_L23_P	AJ9	Referensi FMC Data 20 P
FMC2_LPC_LA21_N	B64_L14_N	AG9	Referensi FMC Data 21 N
FMC2_LPC_LA21_P	B64_L14_P	AF9	Referensi FMC Data 21 P
FMC2_LPC_LA22_N	B64_L15_N	AF8	Referensi FMC Data 22 N
FMC2_LPC_LA22_P	B64_L15_P	AE8	Referensi FMC Data 22 P
FMC2_LPC_LA23_N	B64_L16_N	AE10	Referensi FMC Data 23rd N
FMC2_LPC_LA23_P	B64_L16_P	AD10	Referensi FMC Data kaping 23 P
FMC2_LPC_LA24_N	B64_L1_N	AP10	Referensi FMC Data 24 N
FMC2_LPC_LA24_P	B64_L1_P	AP11	Referensi FMC Data 24 P
FMC2_LPC_LA25_N	B64_L4_N	AN12	Referensi FMC Data 25 N
FMC2_LPC_LA25_P	B64_L4_P	AM12	Referensi FMC Data 25 P
FMC2_LPC_LA26_N	B64_L21_N	AL9	Referensi FMC Data 26 N
FMC2_LPC_LA26_P	B64_L21_P	AK10	Referensi FMC Data 26 P
FMC2_LPC_LA27_N	B64_L24_N	AL8	Referensi FMC Data 27 N
FMC2_LPC_LA27_P	B64_L24_P	AK8	Referensi FMC Data 27 P
FMC2_LPC_LA28_N	B64_L18_N	AH8	Referensi FMC Data 28 N
FMC2_LPC_LA28_P	B64_L18_P	AH9	Referensi FMC Data 28 P
FMC2_LPC_LA29_N	B64_L6_N	AL13	Referensi FMC Data 29 N
FMC2_LPC_LA29_P	B64_L6_P	AK13	Referensi FMC Data 29 P
FMC2_LPC_LA30_N	B64_L8_N	AJ13	Referensi FMC Data 30 N
FMC2_LPC_LA30_P	B64_L8_P	AH13	Referensi FMC Data 30 P
FMC2_LPC_LA31_N	B64_L10_N	AE11	Referensi FMC Data 31 N
FMC2_LPC_LA31_P	B64_L10_P	AD11	Referensi FMC Data 31 P
FMC2_LPC_LA32_N	B64_L7_N	AF13	Referensi FMC Data 32 N
FMC2_LPC_LA32_P	B64_L7_P	AE13	Referensi FMC Data 32 P
FMC2_LPC_LA33_N	B64_L9_N	AF12	Referensi FMC Data 33rd N
FMC2_LPC_LA33_P	B64_L9_P	AE12	Referensi FMC Data kaping 33 P
FMC2_LPC_SCL	B65_L24_N	K21	Jam Bus FMC I2C
FMC2_LPC_SDA	B65_L24_P	K20	Data Bus FMC I2C

3. FMC LPC konektor pin assignment minangka nderek

Jeneng Sinyal	Jeneng Pin	Pin No.	Katrangan
FMC_HPC_CLK0_M2C_N	B67_L11_N	D25	FMC 0th Input referensi ( Jam ) N
FMC_HPC_CLK0_M2C_P	B67_L11_P	E25	FMC 0th Input referensi ( Jam ) P
FMC_HPC_CLK1_M2C_N	B66_L13_N	G11	FMC 1st Input referensi (Jam) N
FMC_HPC_CLK1_M2C_P	B66_L13_P	H11	FMC 1st Input referensi ( Jam ) P
FMC_HPC_LA00_CC_N	B67_L14_N	E23	FMC LA 0th Data ( Jam ) N
FMC_HPC_LA00_CC_P	B67_L14_P	E22	FMC LA 0th Data ( Jam ) P
FMC_HPC_LA01_CC_N	B67_L13_N	C23	FMC LA 1st Data ( Jam ) N
FMC_HPC_LA01_CC_P	B67_L13_P	D23	FMC LA 1st Data ( Jam ) P
FMC_HPC_LA02_N	B67_L8_N	A25	FMC LA 2nd Data N
FMC_HPC_LA02_P	B67_L8_P	B25	FMC LA 2nd Data P

FMC_HPC_LA03_N	B67_L6_N	A28	FMC LA 3rd Data N
FMC_HPC_LA03_P	B67_L6_P	A27	FMC LA 3rd Data P
FMC_HPC_LA04_N	B67_L2_N	B27	FMC LA 4th Data N
FMC_HPC_LA04_P	B67_L2_P	C27	FMC LA 4th Data P
FMC_HPC_LA05_N	B67_L12_N	C24	FMC LA 5th Data N
FMC_HPC_LA05_P	B67_L12_P	D24	FMC LA 5th Data P
FMC_HPC_LA06_N	B67_L4_N	A29	FMC LA 6th Data P
FMC_HPC_LA06_P	B67_L4_P	B29	FMC LA 6th Data P
FMC_HPC_LA07_N	B67_L5_N	C28	FMC LA 7th Data N
FMC_HPC_LA07_P	B67_L5_P	D28	FMC LA 7th Data P
FMC_HPC_LA08_N	B67_L1_N	E27	FMC LA 8th Data N
FMC_HPC_LA08_P	B67_L1_P	F27	FMC LA 8th Data P
FMC_HPC_LA09_N	B67_L9_N	B26	FMC LA 9th Data N
FMC_HPC_LA09_P	B67_L9_P	C26	FMC LA 9th Data P
FMC_HPC_LA10_N	B67_L10_N	A24	FMC LA 10th Data N
FMC_HPC_LA10_P	B67_L10_P	B24	FMC LA 10th Data P
FMC_HPC_LA11_N	B67_L7_N	D26	FMC LA 11th Data N
FMC_HPC_LA11_P	B67_L7_P	E26	FMC LA 11th Data P
FMC_HPC_LA12_N	B67_L3_N	D29	FMC LA 12th Data N
FMC_HPC_LA12_P	B67_L3_P	E28	FMC LA 12th Data P
FMC_HPC_LA13_N	B67_L15_N	B22	FMC LA 13th Data N
FMC_HPC_LA13_P	B67_L15_P	B21	FMC LA 13th Data P
FMC_HPC_LA14_N	B67_L18_N	D21	FMC LA 14th Data N
FMC_HPC_LA14_P	B67_L18_P	D20	FMC LA 14th Data P
FMC_HPC_LA15_N	B67_L17_N	A20	FMC LA 15th Data N
FMC_HPC_LA15_P	B67_L17_P	B20	FMC LA 15th Data P
FMC_HPC_LA16_N	B67_L16_N	C22	FMC LA 16th Data N
FMC_HPC_LA16_P	B67_L16_P	C21	FMC LA 16th Data P
FMC_HPC_LA17_CC_N	B66_L11_N	F9	FMC LA 17th Data(jam)N
FMC_HPC_LA17_CC_P	B66_L11_P	G9	FMC LA 17th Data（jam）P
FMC_HPC_LA18_CC_N	B66_L12_N	F10	FMC LA 18th Data(jam)N
FMC_HPC_LA18_CC_P	B66_L12_P	G10	FMC LA 18th Data（jam）P
FMC_HPC_LA19_N	B66_L21_N	B11	FMC LA 19th Data N
FMC_HPC_LA19_P	B66_L21_P	C11	FMC LA 19th Data P
FMC_HPC_LA20_N	B66_L23_N	A12	FMC LA 20th Data N
FMC_HPC_LA20_P	B66_L23_P	A13	FMC LA 20th Data P
FMC_HPC_LA21_N	B66_L15_N	J11	FMC LA 21st Data N
FMC_HPC_LA21_P	B66_L15_P	K11	FMC LA 21st Data P
FMC_HPC_LA22_N	B66_L19_N	D11	FMC LA 22nd Data N
FMC_HPC_LA22_P	B66_L19_P	E11	FMC LA 22nd Data P
FMC_HPC_LA23_N	B66_L18_N	H13	FMC LA 23rd Data N
FMC_HPC_LA23_P	B66_L18_P	J13	FMC LA 23rd Data P
FMC_HPC_LA24_N	B66_L8_N	H9	FMC LA 24th Data N

FMC_HPC_LA24_P	B66_L8_P	J9	FMC LA 24th Data P
FMC_HPC_LA25_N	B66_L10_N	J10	FMC LA 25th Data N
FMC_HPC_LA25_P	B66_L10_P	K10	FMC LA 25th Data P
FMC_HPC_LA26_N	B66_L6_N	D10	FMC LA 26th Data N
FMC_HPC_LA26_P	B66_L6_P	E10	FMC LA 26th Data P
FMC_HPC_LA27_N	B66_L5_N	C9	FMC LA 27th Data N
FMC_HPC_LA27_P	B66_L5_P	D9	FMC LA 27th Data P
FMC_HPC_LA28_N	B66_L2_N	A9	FMC LA 28th Data N
FMC_HPC_LA28_P	B66_L2_P	B9	FMC LA 28th Data P
FMC_HPC_LA29_N	B66_L4_N	A10	FMC LA 29th Data N
FMC_HPC_LA29_P	B66_L4_P	B10	FMC LA 29th Data P
FMC_HPC_LA30_N	B66_L9_N	H8	FMC LA 30th Data N
FMC_HPC_LA30_P	B66_L9_P	J8	FMC LA 30th Data P
FMC_HPC_LA31_N	B66_L1_N	E8	FMC LA 31st Data N
FMC_HPC_LA31_P	B66_L1_P	F8	FMC LA 31st Data P
FMC_HPC_LA32_N	B66_L3_N	C8	FMC LA 32nd Data N
FMC_HPC_LA32_P	B66_L3_P	D8	FMC LA 32nd Data P
FMC_HPC_LA33_N	B66_L7_N	K8	FMC LA 33rd Data N
FMC_HPC_LA33_P	B66_L7_P	L8	FMC LA 33rd Data P
FMC_HPC_HA00_CC_N	B68_L14_N	F17	FMC HA 0th Data(jam)N
FMC_HPC_HA00_CC_P	B68_L14_P	F18	FMC HA 0th Data(jam)P
FMC_HPC_HA01_CC_N	B68_L12_N	E17	FMC HA 1st Data(jam)N
FMC_HPC_HA01_CC_P	B68_L12_P	E18	FMC HA 1st Data（jam）P
FMC_HPC_HA02_N	B68_L17_N	H16	FMC HA 2nd Data N
FMC_HPC_HA02_P	B68_L17_P	H17	FMC HA 2nd Data P
FMC_HPC_HA03_N	B68_L24_N	L18	FMC HA 3rd Data N
FMC_HPC_HA03_P	B68_L24_P	L19	FMC HA 3rd Data N
FMC_HPC_HA04_N	B68_L6_N	C17	FMC HA 4th Data N
FMC_HPC_HA04_P	B68_L6_P	C18	FMC HA 4th Data P
FMC_HPC_HA05_N	B68_L2_N	A18	FMC HA 5th Data N
FMC_HPC_HA05_P	B68_L2_P	A19	FMC HA 5th Data P
FMC_HPC_HA06_N	B68_L22_N	J18	FMC HA 6th Data N
FMC_HPC_HA06_P	B68_L22_P	J19	FMC HA 6th Data P
FMC_HPC_HA07_N	B68_L4_N	B19	FMC HA 7th Data N
FMC_HPC_HA07_P	B68_L4_P	C19	FMC HA 7th Data P
FMC_HPC_HA08_N	B68_L18_N	H18	FMC HA 8th Data N
FMC_HPC_HA08_P	B68_L18_P	H19	FMC HA 8th Data P
FMC_HPC_HA09_N	B68_L7_N	C14	FMC HA 9th Data N
FMC_HPC_HA09_P	B68_L7_P	D14	FMC HA 9th Data P
FMC_HPC_HA10_N	B68_L1_N	A14	FMC HA 10th Data N
FMC_HPC_HA10_P	B68_L1_P	B14	FMC HA 10th Data P
FMC_HPC_HA11_N	B68_L5_N	B16	FMC HA 11th Data N

FMC_HPC_HA11_P	B68_L5_P	B17	FMC HA 11th Data P
FMC_HPC_HA12_N	B68_L16_N	F19	FMC HA 12th Data N
FMC_HPC_HA12_P	B68_L16_P	G19	FMC HA 12th Data P
FMC_HPC_HA13_N	B68_L3_N	A15	FMC HA 13th Data N
FMC_HPC_HA13_P	B68_L3_P	B15	FMC HA 13th Data P
FMC_HPC_HA14_N	B68_L23_N	J16	FMC HA 14th Data N
FMC_HPC_HA14_P	B68_L23_P	K16	FMC HA 14th Data P
FMC_HPC_HA15_N	B68_L20_N	K17	FMC HA 15th Data N
FMC_HPC_HA15_P	B68_L20_P	K18	FMC HA 15th Data P
FMC_HPC_HA16_N	B68_L10_N	D18	FMC HA 16th Data N
FMC_HPC_HA16_P	B68_L10_P	D19	FMC HA 16th Data P
FMC_HPC_HA17_CC_N	B68_L13_N	G16	FMC HA 17th Data(jam)N
FMC_HPC_HA17_CC_P	B68_L13_P	G17	FMC HA 17th Data(jam)P
FMC_HPC_HA18_N	B68_L21_N	K15	FMC HA 18th Data N
FMC_HPC_HA18_P	B68_L21_P	L15	FMC HA 18th Data P
FMC_HPC_HA19_N	B68_L15_N	G14	FMC HA 19th Data N
FMC_HPC_HA19_P	B68_L15_P	G15	FMC HA 19th Data P
FMC_HPC_HA20_N	B68_L11_N	D16	FMC HA 20th Data N
FMC_HPC_HA20_P	B68_L11_P	E16	FMC HA 20th Data P
FMC_HPC_HA21_N	B68_L19_N	J14	FMC HA 21st Data N
FMC_HPC_HA21_P	B68_L19_P	J15	FMC HA 21st Data P
FMC_HPC_HA22_N	B68_L8_N	D15	FMC HA 22nd Data N
FMC_HPC_HA22_P	B68_L8_P	E15	FMC HA 22nd Data P
FMC_HPC_HA23_N	B68_L9_N	F14	FMC HA 23rd Data N
FMC_HPC_HA23_P	B68_L9_P	F15	FMC HA 23rd Data P
FMC_HPC_SCL	B66_L17_N	K12	Data Bus FMC I2C
FMC_HPC_SDA	B66_L17_P	L12	Data Bus FMC I2C
FMC_GBTCLK0_M2C_P	227_CLK1_P	M6	Jam Referensi Transceiver 0 input P
FMC_GBTCLK0_M2C_N	227_CLK1_N	M5	Jam Referensi Transceiver 0 input N
FMC_GBTCLK1_M2C_P	228_CLK1_P	H6	Jam Referensi Transceiver 1 input P
FMC_GBTCLK1_M2C_N	228_CLK1_N	H5	Jam Referensi Transceiver 1 input N
FMC_DP0_M2C_P	227_RX0_P	M2	Data Transceiver 0 Input P
FMC_DP0_M2C_N	227_RX0_N	M1	Data Transceiver 0 Input N
FMC_DP1_M2C_P	227_RX1_P	K2	Data Transceiver 1 Input P
FMC_DP1_M2C_N	227_RX1_N	K1	Data Transceiver 1 Input N
FMC_DP2_M2C_P	227_RX2_P	H2	Data Transceiver 2 Input P
FMC_DP2_M2C_N	227_RX2_N	H1	Data Transceiver 2 Input N
FMC_DP3_M2C_P	227_RX3_P	F2	Data Transceiver 3 Input P
FMC_DP3_M2C_N	227_RX3_N	F1	Data Transceiver 3 Input N
FMC_DP4_M2C_P	228_RX1_P	D2	Data Transceiver 4 Input P
FMC_DP4_M2C_N	228_RX1_N	D1	Data Transceiver 4 Input N
FMC_DP5_M2C_P	228_RX3_P	A4	Data Transceiver 5 Input P

FMC_DP5_M2C_N	228_RX3_N	A3	Data Transceiver 5 Input N
FMC_DP6_M2C_P	228_RX2_P	B2	Data Transceiver 6 Input P
FMC_DP6_M2C_N	228_RX2_N	B1	Data Transceiver 6 Input N
FMC_DP7_M2C_P	228_RX0_P	E4	Data Transceiver 7 Input P
FMC_DP7_M2C_N	228_RX0_N	E3	Data Transceiver 7 Input N
FMC_DP0_C2M_P	227_TX0_P	N4	Data Transceiver 0 Output P
FMC_DP0_C2M_N	227_TX0_N	N3	Data Transceiver 0 Output N
FMC_DP1_C2M_P	227_TX1_P	L4	Data Transceiver 1 Output P
FMC_DP1_C2M_N	227_TX1_N	L3	Data Transceiver 1 Output N
FMC_DP2_C2M_P	227_TX2_P	J4	Data Transceiver 2 Output P
FMC_DP2_C2M_N	227_TX2_N	J3	Data Transceiver 2 Output N
FMC_DP3_C2M_P	227_TX3_P	G4	Data Transceiver 3 Output P
FMC_DP3_C2M_N	227_TX3_N	G3	Data Transceiver 3 Output N
FMC_DP4_C2M_P	228_TX1_P	D6	Data Transceiver 4 Output P
FMC_DP4_C2M_N	228_TX1_N	D5	Data Transceiver 4 Output N
FMC_DP5_C2M_P	228_TX3_P	B6	Data Transceiver 5 Output P
FMC_DP5_C2M_N	228_TX3_N	B5	Data Transceiver 5 Output N
FMC_DP6_C2M_P	228_TX2_P	C4	Data Transceiver 6 Output P
FMC_DP6_C2M_N	228_TX2_N	C3	Data Transceiver 6 Output N
FMC_DP7_C2M_P	228_TX0_P	F6	Data Transceiver 7 Output P
FMC_DP7_C2M_N	228_TX0_N	F5	Data Transceiver 7 Output N

Part 2.7: Slot kertu SD
Papan pangembangan AXKU042 FPGA kalebu antarmuka kertu Micro SD kanggo nyedhiyakake pangguna akses menyang memori kertu SD kanggo nyimpen gambar, musik utawa data pangguna liyane files. Sinyal disambungake menyang sinyal IO saka BANK64 saka FPGA, lan skema FPGA lan konektor kertu SD ditampilake ing Figure 2-7-1

Figure 2-7-1 SD Card Slot skema diagram SD Card Slot pin assignment

Jeneng Sinyal	Jeneng Pin FPGA	Nomer Pin	Katrangan
SD_CLK	B64_L22_P	AN8	Sinyal Jam SD
SD_CMD	B64_L19_N	AM10	Sinyal Command SD
SD_D0	B64_L5_N	AL12	SD Data 0
SD_D1	B64_L19_P	AL10	SD Data 1
SD_D2	B64_L2_P	AN13	SD Data 2
SD_D3	B64_L2_N	AP13	SD Data 3
SD_CD	B64_L22_N	AP8	Sinyal selipan kertu SD

Bagean 2.8: Antarmuka SMA Papan pangembangan AXKU042 FPGA dirancang kanthi 2 antarmuka SMA, lan sinyal diferensial disambungake menyang port IO jam biasa BANK66, nyedhiyakake antarmuka jam eksternal utawa miturut port IO biasa, tingkat antarmuka yaiku 1.8V. Diagram skematik sambungan antarmuka FPGA lan SMA ditampilake ing Figure 2-8-1.

SMA Antarmuka pin assignment

Jeneng Sinyal	Jeneng Pin FPGA	Nomer Pin	Katrangan
SMA_CLKIN_N	B66_L14_N	G12	Sinyal Jam Transceiver N
SMA_CLKIN_P	B66_L14_P	H12	Sinyal Jam Transceiver P

Bagean 2.9: Sensor Suhu lan EEPROM

Chip sensor suhu digital sing presisi dhuwur, kurang daya, dipasang ing papan pangembangan AXKU042 FPGA, lan model kasebut yaiku LM75A saka ON Semiconductor. Akurasi suhu chip LM75A yaiku 0.5 derajat. Sensor lan FPGA langsung disambungake menyang antarmuka digital I2C. FPGA maca suhu cedhak Papan pangembangan FPGA saiki liwat antarmuka I2C. Model EEPROM punika 24LC04, lan kapasitas: 4Kbit, kang disambungake menyang terminal PS liwat bis I2C.

Gambar 2-9-1 ing ngisor iki nuduhake desain sensor LM75 lan chip EEPROM

Jeneng Pin	Jeneng Pin FPGA	Pin FPGA
I2C_SDA	B66_L16_N	K13
I2C_SCL	B66_L16_P	L13

Gambar 2-9-1 I2C Sambungan skema diagram I2C Sensor Pin Assignment

Bagean 2.10: Lampu LED Ana Pitu LED abang ing papan operator AXKU042 FPGA, salah sijine yaiku indikator daya (PWR), papat minangka indikator kontrol, loro minangka indikator panel. Nalika papan FPGA AXKU042 diuripake, indikator daya bakal murup, 4 pangguna LED lan indikator panel loro disambungake menyang IO saka FPGA BANK65 lan BANK66, pangguna bisa ngontrol cahya lan kepunahan liwat program kasebut. Nalika IO voltage disambungake menyang pangguna LED diatur tingkat kurang, pangguna LED murup. Nalika disambungake IO voltage dikonfigurasi minangka tingkat dhuwur, pangguna LED bakal dipateni.

Sambungan hardware LED ditampilake ing Figure 2-10-1

Gambar 2-10-2 LED indikator panel

Pin assignment saka lampu LED pangguna

Jeneng Sinyal	Jeneng Pin FPGA	Nomer Pin	Katrangan
LED1	B66_T3U	E12	Lampu indikator sing ditemtokake pangguna
LED2	B66_T2U	F12	Lampu indikator sing ditemtokake pangguna
LED3	B66_T1U	L9	Lampu indikator sing ditemtokake pangguna
LED4	B65_T0U	H23	Lampu indikator sing ditemtokake pangguna
TEST_LED1	B66_L22_N	E13	indikator panel
TEST_LED2	B66_L22_P	F13	indikator panel

Bagean 2.11: Tombol

Papan pangembangan AXKU062 FPGA ngemot rong Tombol pangguna lan 1 tombol reset. Siji tombol pangguna disambungake menyang IO saka FPGA BANK65. Tombol pangguna aktif ing tingkat kurang kanggo éling sawetara fungsi saka Papan kanggo pelanggan; Tombol reset digunakake kanggo ngreset sistem. Sirkuit bagean tombol pangguna ditampilake ing Gambar 2-11-1:

Keys Pin Assignment

Jeneng Sinyal	Jeneng Pin FPGA	Nomer Pin	Katrangan
KUNCI1	B65_T1U	N23	Input Kunci pangguna
FPGA_RSETN	B65_T2U	N27	Sistem Reset

Bagian 2.12: JTAG Antarmuka

Ing JTAG antarmuka dilindhungi undhang-undhang ing Papan pangembangan AXKU042 kanggo download program FPGA utawa program perangkat kukuh kanggo FLASH. Supaya ora ngrusak chip FPGA kanthi plugging lan copot daya, kita nambahake dioda proteksi menyang JTAG sinyal kanggo mesthekake yen sinyal voltage ing sawetara ditampa dening FPGA lan supaya karusakan kanggo chip FPGA. JTAG diagram skematis ditampilake ing Gambar 2-12-1:

Bagean 2.13: Sumber Daya

Daya input voltage Papan pangembangan AXKU042 punika DC12V, karo external + 12V sumber daya utawa daya diwenehake kanggo Papan liwat PCIE. Nalika nggunakake sumber daya eksternal, gunakake sumber daya sing diwenehake dening papan pangembangan, lan aja nggunakake spesifikasi sumber daya liyane supaya ora ngrusak papan pangembangan. Diagram skematis saka desain sumber daya ing Papan ditampilake ing Figure 2-13-1

Bagean 2.14: Penggemar

Amarga FPGA ngasilake akeh panas nalika kerjane biasane, kita nambah sink panas lan penggemar kanggo chip ing Papan kanggo nyegah chip saka overheating. Kontrol penggemar dikontrol dening chip FPGA. Pin kontrol disambungake menyang IO saka BANK48. Yen output tingkat IO dhuwur, MOSFET diuripake lan penggemar bisa digunakake. Yen output tingkat IO kurang, penggemar mandheg. Desain penggemar ing Papan ditampilake ing Figure 2-14-1.

Fan Pin Assignment

Jeneng Sinyal	Jeneng Pin FPGA	Nomer Pin	Katrangan
FAN_PWM	B64_T0U	AK11	Pin kontrol kipas

Part 2.15: Ukuran Ukuran

http://www.alinx.com

Dokumen / Sumber Daya

Papan Pangembangan FPGA ALINX AXKU042 KINTEX UltraScale [pdf] Manual pangguna
AXKU042 KINTEX UltraScale FPGA Development Board, AXKU042, KINTEX UltraScale FPGA Development Board, UltraScale FPGA Development Board, FPGA Development Board, Development Board, Board

Referensi

Manual pangguna